When I've been doing a Sysex transfer of a full bank of patches to RAM banks using Logic it always seems to miss out patch no 127, I've tried different speeds from 100bpm upwards to see if that made any difference but it persistently leaves out the last patch in the bank.
I've not noticed this happening whenever I've dumped a handful of patches at a time before, it's not the end of the world as I can just drag & drop a single patch over using VC to slot 127 to complete the RAM bank at a later time.